The present invention relates to a controller for controlling a disk array which divides data and stores the data in a plurality of disk drives.
As compared to an I/O performance of a main storage of a computer, an I/O performance of a subsystem using a magnetic disk as a secondary storage has a processing ability inferior by about three to four digits. Reducing this difference, i.e., improving the I/O performance of the sub-system has been tried in various ways.
As one method of improving the I/O performance of a sub-system, a sub-system has been proposed which is constituted of a plurality of disk drives and data is divisionally stored in the disk drives, i.e., a so-called disk array system is known.
For example, according to one conventional technique (hereinafter called a first conventional technique), as shown in FIG. 2, a disk array system is constituted of: a plurality of channel I/F units 111 for executing data transfer between a host computer 101 and a disk array controller 2; a plurality of disk I/F units 112 for executing data transfer between disk drives 120 and the disk array controller 2; cache memory units 115 for temporarily storing data of the disk drives 120; and shared memory units 114 for storing control information on the data in the disk drives 120 and on the disk array controller 2, wherein the cache memory units 115 and shared memory units 114 can be accessed from all of channel I/F units 111 and disk I/F units 112.
According to the first conventional technique, the channel I/F units 111 and disk units I/F units 112 are connected to the shared memory units 114 in one-to-one correspondence, and the channel I/F units 111 and disk units I/F units 112 are also connected to the cache memory units 114 in one-to-one correspondence.
According to another conventional technique (hereinafter called a second conventional technique), as shown in FIG. 3, a disk array system is constituted of: a plurality of channel I/F units 111 for executing data transfer between a host computer 101 and a disk array controller 3; a plurality of disk I/F units 112 for executing data transfer between disk drives 120 and the disk array controller 3; cache memory units 115 for temporarily storing data of the disk drives 120; and shared memory units 114 for storing control information on the data in the disk drives 120 and on the disk array controller 3.
The channel I/F units 111 and disk I/F units 112 are connected to the shared memory units 114 via a shared bus 130, and to the cache memory units 115 via a shared bus 131.
Request for high performance of a disk array system has been dealt with by using a large scale disk array controller and high speed components, e.g., by an increase in the number of processors and in the cache capacity, use of high performance processors, expansion of an internal bus width, improvement on a bus transfer ability and the like.
With the second conventional techniques, however, it is becoming difficult for the transfer ability of an internal bus to follow a large scale system and performance improvement.
In order to achieve a high memory access performance by improving the internal bus performance, it is conceivable that one-to-one correspondence between processors and memories similar to the first conventional technique is preferable.
With this method, the internal bus performance improves proportionally to the number of access paths connected to the memories.
However, the number of access paths connected to shared memories and cache memories increases in proportion to an increase in the number of processors used in the system.
In order to maximize the internal bus performance, it is necessary to efficiently control the accesses between each processor and each memory.